Working exercise for m4

1 files changed, 0 insertions, 26 deletions

diff --git a/sem6/dig/m4/dflip.vhdl b/sem6/dig/m4/dflip.vhdl
deleted file mode 100644
index 5f722d3..0000000
--- a/sem6/dig/m4/dflip.vhdl
+++ /dev/null
@@ -1,26 +0,0 @@
-LIBRARY IEEE;
-USE IEEE.STD_LOGIC_1164.all;
-
-ENTITY dflip IS
-    PORT(
-            d: IN STD_LOGIC;
-            clk: IN STD_LOGIC;
-            q: OUT STD_LOGIC;
-            nq: OUT STD_LOGIC
-        );
-END dflip;
-
-ARCHITECTURE impl OF dflip IS
-    SIGNAL qi : STD_LOGIC;
-BEGIN
-    nq <= NOT qi;
-    q <= qi;
-    PROCESS (clk)
-    BEGIN
-    -- Check if high edge
-        if (clk'event and clk = '1') then
-            qi <= d;
-        end if;
-    END PROCESS;
-END IMPL;
-