blob: bfc27b9f887cd4540c3950d0cbd24b547d6b6512 (
plain)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
|
-- TEST_START{"inputs": ["a", "b", "cin"], "outputs": ["o", "cout"], "testin": ["000", "010", "100", "110", "011", "111"]}TEST_STOP
LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.all;
ENTITY ex5 IS
PORT(
a: IN STD_LOGIC;
b: IN STD_LOGIC;
cin: IN STD_LOGIC;
o: OUT STD_LOGIC;
cout: OUT STD_LOGIC);
END ex5;
ARCHITECTURE impl OF ex5 IS
BEGIN
o <= (a XOR b) XOR cin;
cout <= (a AND b) OR (cin AND (a OR b));
END impl;
|
