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authorJulian T <julian@jtle.dk>2021-06-04 13:00:07 +0200
committerJulian T <julian@jtle.dk>2021-06-04 13:00:07 +0200
commit802c3d64d2402c5bf060fb5488bd10688d2a6965 (patch)
tree5556ab35b73819531103f78579da7abffefa016d /sem6/dig/mpc2
parent703d1962bd5128e0067f49f3889d76e080ece860 (diff)
Add more changes to dig and prob
Diffstat (limited to 'sem6/dig/mpc2')
-rw-r--r--sem6/dig/mpc2/opgaver.tex80
1 files changed, 66 insertions, 14 deletions
diff --git a/sem6/dig/mpc2/opgaver.tex b/sem6/dig/mpc2/opgaver.tex
index 6d0826e..74aba7d 100644
--- a/sem6/dig/mpc2/opgaver.tex
+++ b/sem6/dig/mpc2/opgaver.tex
@@ -1,8 +1,28 @@
\title{Opgaver til Microprocessors 2}
\date{2021-03-24}
+Har fundet ud af at jeg har lavet de forkerte opgaver \texttt{:-(}.
+
\section{Problem 4.1}
+\begin{opg}
+ What are the four steps CPUs use to execute instructions
+\end{opg}
+
+\paragraph{Fetch} comes first, where the instruction is fetched from memory.
+This is taken from where the instruction pointer is pointing.
+
+\paragraph{Decode} instruction, where it most likely requires multiple microcode instructions.
+
+Whether to \textbf{Access memory} is determined in the decoding step.
+If this is required, this memory must be fetched from memory.
+
+\paragraph{Execute} the instruction using the fetched memory and register values.
+
+\paragraph{Repeat} from the beginning with a new fetch.
+
+\section{Problem 4.2}
+
\emph{In Fig. 4-6, the B bus register is encoded in a 4-bit field, but the C bus is represented
as a bit map. Why?}
@@ -11,13 +31,13 @@ Therefore one cannot take the shortcut with a 4-bit field, as that would only al
One cannot present 1 and 2 at the same time in 4-bit field, as that would activate register 3.
-\section{Problem 4.5}
+\section{Problem 4.4}
{\itshape
Suppose that in the example of Fig. 4-14(a) the statement
- \begin{verbatim}
- k = 5;
- \end{verbatim}
+\begin{verbatim}
+ k = 5;
+\end{verbatim}
is added after the if statement. What would the new assembly code be? Assume that
the compiler is an optimizing compiler.
}
@@ -38,13 +58,46 @@ Well k is set either way, so one can invert the if.
ISTORE k
\end{verbatim}
+\section{Problem 4.4 Moodle}
+
+\begin{opg}
+ Give two different IJVM translations for the following IJVM code:
+\begin{verbatim}
+ i = j + m + 8;
+\end{verbatim}
+\end{opg}
+
+Dette kan man gøre ved at load $j$ og $m$ fra stacken og add dem.
+Derefter kan push 8 og add den.
+Herefter gemmer man i $i$.
+
+\begin{verbatim}
+ ILOAD j
+ ILOAD m
+ IADD
+ BIPUSH 8
+ IADD
+ ISTORE i
+\end{verbatim}
+
+En anden måde er at push alle ting først også add flere gange efter hinnanden.
+
+\begin{verbatim}
+ ILOAD j
+ ILOAD m
+ BIPUSH 8
+ IADD
+ IADD
+ ISTORE i
+\end{verbatim}
+
\section{Problem 4.9}
{\itshape
How long does a 2.5-GHz Mic-1 take to execute the Java statement
- \begin{verbatim}
- i = j + k
- \end{verbatim}
+\begin{verbatim}
+ i = j + k;
+\end{verbatim}
Give your answer in nanoseconds
}
@@ -59,13 +112,12 @@ First we "compile" the java statement :-).
Then we can add how many microinstructions each takes (\textbf{bold} number) multiplied with how many times it is used.
-\begin{equation}
- \underbrace{\mathbf 1 \cdot 4}_{MAIN} + \underbrace{\mathbf 5 \cdot 2}_{ILOAD} + \underbrace{\mathbf 3}_{IADD} + \underbrace{\mathbf 6}_{ISTORE} = 23
-\end{equation}
+\[
+\underbrace{\mathbf 1 \cdot 4}_{\mathrm{MAIN}} + \underbrace{\mathbf 5 \cdot 2}_{\mathrm{ILOAD}} + \underbrace{\mathbf 3}_{\mathrm{IADD}} + \underbrace{\mathbf 6}_{\mathrm{ISTORE}} = 23
+\]
Then we can multiply with the nanoseconds a single instruction takes
-\begin{equation}
- \frac 1 {2.5 \cdot 10^9} \cdot 23 = 9.2 \cdot 10^{-9}\,,
-\end{equation}
+\[
+ \frac 1 {\SI{2.5e9}{Hz}} \cdot 23 = \SI{9.2e-9}{s}\,,
+\]
which is 9.2 Nanoseconds.
-