From 211d0ff6835017ba4c237fa909837ca84e1e095b Mon Sep 17 00:00:00 2001
From: Julian T <julian@jtle.dk>
Date: Mon, 31 May 2021 11:30:40 +0200
Subject: Add many more solutions and notes

---
 sem6/dig/m2/ex3.vhdl | 15 +++++++++++++++
 1 file changed, 15 insertions(+)
 create mode 100644 sem6/dig/m2/ex3.vhdl

(limited to 'sem6/dig/m2/ex3.vhdl')

diff --git a/sem6/dig/m2/ex3.vhdl b/sem6/dig/m2/ex3.vhdl
new file mode 100644
index 0000000..8b3603a
--- /dev/null
+++ b/sem6/dig/m2/ex3.vhdl
@@ -0,0 +1,15 @@
+-- TEST_START{"inputs": ["a", "b"], "outputs": ["o"], "testin": ["00", "01", "10", "11"]}TEST_STOP
+LIBRARY IEEE;
+USE IEEE.STD_LOGIC_1164.all;
+
+ENTITY ex3 IS
+    PORT(
+        a: IN STD_LOGIC;
+        b: IN STD_LOGIC;
+        o: OUT STD_LOGIC);
+END ex3;
+
+ARCHITECTURE impl OF ex3 IS
+BEGIN
+    o <= a and b;
+END impl;
-- 
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