From 8a37c059748673e14f352fa70dbf974f33310c43 Mon Sep 17 00:00:00 2001
From: Julian T <julian@jtle.dk>
Date: Mon, 8 Feb 2021 16:16:54 +0100
Subject: Add Makefile and testgenerator to run vhdl files

---
 sem6/dig/m2/Makefile | 30 ++++++++++++++++++++++++++++++
 1 file changed, 30 insertions(+)
 create mode 100644 sem6/dig/m2/Makefile

(limited to 'sem6/dig/m2/Makefile')

diff --git a/sem6/dig/m2/Makefile b/sem6/dig/m2/Makefile
new file mode 100644
index 0000000..2731d67
--- /dev/null
+++ b/sem6/dig/m2/Makefile
@@ -0,0 +1,30 @@
+
+INPUTFILES=nor_gate
+
+all: $(INPUTFILES)
+
+.PHONY: all clean
+
+%.o: %.vhdl
+	ghdl -a $^
+
+$(INPUTFILES): %: %.o
+	ghdl -e $@
+
+test_%.vhdl: %.vhdl generate_test_file.py
+	./generate_test_file.py $< $@
+
+test_$(INPUTFILES): %: %.o
+	ghdl -e $@
+
+run_%: %
+	ghdl -r $^
+
+sim_%: test_% %
+	-./$< --vcd=out.vcd
+
+clean:
+	ghdl --clean
+	rm -f work*.cf
+	rm -f test_*.vhdl
+
-- 
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